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PCI9056 , O IRDY# , 0 LOCK# , 0 PLCK , 0 PAR , FRAME# , 0 STOP# , 0 | PERR# , hC C/BE1# , C/BE0# , ( GNT1# , `Y GNT0#/REQ#, IDSEL , 0 C/BE2# , X DEVSEL# , 0 SERR# , 0 p REQ2# , GNT2# , 0 TDO , 0y INTA# , | C/BE3# , 0 TRDY# , 0 ) REQ1# , GNT4# , 0 REQ4# , 0 Hi TMS , 0 آ TCK , 0 X RST# , 0 REQ0/GNT# , / GNT3# , 0 8c REQ3# , Hi GNT5# , GNT6# , 0 hC PME# , # BD_SEL# , 0 TRSRT# , 0 TDI , 0 Ȝ REQ5# , @ ENUM# , 0 9 REQ6# , CPCISW , IDDQEN# , 0 0 PMEREQ# , 0 (] LEDON# , EECS , EESK , xI EEDI/EEDO , 0 c , CSS# , DACK0# , ) DREQ0# , DACK1# , p DREQ1# , 0 h o , 0 0y } , 0 І LINTO# , 0 # LINTI# , 0 ` LRESET# , 0 H , ? HOSTEN# , (] , 0 `Y TS#/ADS# , BB#/BREQI , 0 , 0 ( , 8c DP0/DP3 , H BI#/MTREM#, ` ¯ , 3 BG#/LHOLDA, DP1/DP2 , 9 DP3/DP0 , 0 PS Я , 0 3 MODE1 , 0 MODE0 , 0 TA#/READY#, 0 ݯ , BR#/LHOLD , Ȝ DP2/DP1 , 0 @M LCLK , 0 @ " ^x P " ^P| P " ^| P| x " ^| x x 1 _ " >NAME 1 `" >VALUE, @M 2.5VAUX , CARD_VAUX , m & g PCI-LA , H , m , ! , LA3/LA28 , hC LA4/LA27 , 0 LA5/LA26 , | LA6/LA25 , PS LA9/LA22 , LA8/LA23 , LA7/LA24 , 8c LA14/LA17 , ) LA12/LA19 , LA11/LA20 , LA10/LA21 , LA20/LA11 , LA15/LA16 , Ȝ LA16/LA15 , p LA13/LA18 , LA24/LA7 , LA21/LA10 , X LA18/LA13 , 9 LA17/LA14 , LA29/LA2 , LA25/LA6 , @ LA23/LA8 , s LA19/LA12 , LA31/LBE0#, `Y LA27/LA4 , xI LA22/LA9 , ( LA28/LA3 , LA26/LA5 , / LA30/LBE1#" ^ s3 sHi " ^ sHi Hi " ^ Hi 3 " ^ 3 s3 1 _ s e " >NAME 1 ` s" >VALUE & g PCI-LD , . , hC > , m M , / \ , `Y j , @ x , s , 8c , , , Ű , ( , , xI , X , , ) , . , | < , K , Y , g , u , , 9 , Ȝ , p , ñ , PS ӱ , 0 , H , " ^ s3 sHi " ^ sHi Hi " ^ Hi 3 " ^ 3 s3 1 _ s e " >NAME 1 ` s" >VALUE X - , @ OXU VSS@1 , @ XU VSS@2 , @ XU VSS@3 , @ 0yXU VSS@4 , @ hXU VSS@5 , @ ?XU VSS@6 , @ آXU VSS@7 , @ XU VSS@8 , @ HiXU VSS@9 , @ XU VSS@10 , @ /XU VSS@11 , @ XU VSS@12 , @ (XU VSS@13 , @ `YXU VSS@14 , @ XU VSS@15 , @ XU VSS@16 , @ XU VSS@17 , @ @XU VSS@18 , @ xIXU VSS@19 , @ XU VSS@20 , @ XU VSS@21 , @ sXU VSS@22 , @ XXU VSS@23 , @ 9XU VSS@24 , @ ȜXU VSS@25 , @ XU VSS@26 , @ 8c XU VSS@27 , @ p XU VSS@28 , @ ) XU VSS@29 , @ XU VSS@30 , @ XU VSS@31 , @ PS XU VSS@32 , @ XU VSS@33 , @ XU VSS@34 , @ | XU VSS@35 , @ 0 XU VSS@36 , @ hC XU VSS@37 , @ XU VSS@38 , @ XU VSS@39 , @ m XU VSS@40 , @ H XU VSS@41 , @ 3 XU VSS@42 , @ XU VSS@43 , @ XU VSS@44 , @ (] XU VSS@45 , @ ` XU VSS@46 , @ # XU VSS@47 , @ І XU VSS@48 , @ XU VSS@49 , @ @M XU VSS@50 , @ x XU VSS@51 , @
XU VSS@52 , @ v
XU VSS@53 , @
XU VSS@54 , @ X= XU VSS@55 , @ xI) VIO@1 , @ ) VIO@2 , @ ) VIO@3 , @ s) VIO@4 , @ ) ) VCORE@1 , @ ) VCORE@2 , @ ) VCORE@3 , @ PS ) VCORE@4 , @ ) VCORE@5 , @ ) VCORE@6 , @ ) VRING@1 , @ m ) VRING@2 , @ H ) VRING@3 , @ 3 ) VRING@4 , @ ) VRING@5 , @ ) VRING@6 , @ (] ) VRING@7 , @ ` ) VRING@8 , @ # ) VRING@9 , @ І ) VRING@10 , @ ) VRING@11 , @ @M ) VRING@12 , @ x ) VRING@13 1 _O " >NAME 1 `O " >VALUE1 `{1 " VIO 1 `D[ 1 " VCORE 1 `T 1 " VRING 1 `Ȝ,k" VSS " ^P9 9 " ^ 9 p " ^ p Pp " ^Pp P9 & - PCI-AD , XH AD0 , Xm AD1 , X AD2 , X AD3 , XhC AD4 , X0 AD5 , X| AD6 , X AD7 , X AD8 , XPS AD9 , X AD10 , X AD11 , X) AD12 , Xp AD13 , X8c AD14 , X AD15 , XȜ AD16 , X9 AD17 , XX AD18 , X s AD19 , X AD20 , X AD21 , XxI AD22 , X@ AD23 , X AD24 , X AD25 , X AD26 , X`Y AD27 , X( AD28 , X AD29 , X/ AD30 , X AD31 " ^93 9Hi " ^9Hip Hi " ^p Hip 3 " ^p 3 93 1 _9 e " >NAME 1 `9" >VALUE ( plxtech 'lU ڲҲ + d$ A1 + d B1 + d C1 + dȯ D1 + d E1 + da F1 + d: G1 + d H1 + dx J1 + dh K1 + dX L1 + dHw M1 + d8P N1 + d() P1 + d R1 + d T1 + d$ A2 + d B2 + d C2 + dȯ D2 + d E2 + da F2 + d: G2 + d H2 + dx J2 + dh K2 + dX L2 + dHw M2 + d8P N2 + d() P2 + d R2 + d T2 + d()$ A3 + d() B3 + d() C3 + d()ȯ D3 + d() E3 + d()a F3 + d(): G3 + d() H3 + d()x J3 + d()h K3 + d()X L3 + d()Hw M3 + d()8P N3 + d()() P3 + d() R3 + d() T3 + d8P$ A4 + d8P B4 + d8P C4 + d8Pȯ D4 + d8P E4 + d8Pa F4 + d8P: G4 + d8P H4 + d8Px J4 + d8Ph K4 + d8PX L4 + d8PHw M4 + d8P8P N4 + d8P() P4 + d8P R4 + d8P T4 + dHw$ A5 + dHw B5 + dHw C5 + dHwȯ D5 + dHw E5 + dHwa F5 + dHw: G5 + dHw H5 + dHwx J5 + dHwh K5 + dHwX L5 + dHwHw M5 + dHw8P N5 + dHw() P5 + dHw R5 + dHw T5 + dX$ A6 + dX B6 + dX C6 + dXȯ D6 + dX E6 + dXa F6 + dX: G6 + dX H6 + dXx J6 + dXh K6 + dXX L6 + dXHw M6 + dX8P N6 + dX() P6 + dX R6 + dX T6 + dh$ A7 + dh B7 + dh C7 + dhȯ D7 + dh E7 + dha F7 + dh: G7 + dh H7 + dhx J7 + dhh K7 + dhX L7 + dhHw M7 + dh8P N7 + dh() P7 + dh R7 + dh T7 + dx$ A8 + dx B8 + dx C8 + dxȯ D8 + dx E8 + dxa F8 + dx: G8 + dx H8 + dxx J8 + dxh K8 + dxX L8 + dxHw M8 + dx8P N8 + dx() P8 + dx R8 + dx T8 + d $ A9 + d B9 + d C9 + d ȯ D9 + d E9 + d a F9 + d : G9 + d H9 + d x J9 + d h K9 + d X L9 + d Hw M9 + d 8P N9 + d () P9 + d R9 + d T9 + d: $ A10 + d: B10 + d: C10 + d: ȯ D10 + d: E10 + d: a F10 + d: : G10 + d: H10 + d: x J10 + d: h K10 + d: X L10 + d: Hw M10 + d: 8P N10 + d: () P10 + d: R10 + d: T10 + da $ A11 + da B11 + da C11 + da ȯ D11 + da E11 + da a F11 + da : G11 + da H11 + da x J11 + da h K11 + da X L11 + da Hw M11 + da 8P N11 + da () P11 + da R11 + da T11 + d $ A12 + d B12 + d C12 + d ȯ D12 + d E12 + d a F12 + d : G12 + d H12 + d x J12 + d h K12 + d X L12 + d Hw M12 + d 8P N12 + d () P12 + d R12 + d T12 + dȯ $ A13 + dȯ B13 + dȯ C13 + dȯ ȯ D13 + dȯ E13 + dȯ a F13 + dȯ : G13 + dȯ H13 + dȯ x J13 + dȯ h K13 + dȯ X L13 + dȯ Hw M13 + dȯ 8P N13 + dȯ () P13 + dȯ R13 + dȯ T13 + d $ A14 + d B14 + d C14 + d ȯ D14 + d E14 + d a F14 + d : G14 + d H14 + d x J14 + d h K14 + d X L14 + d Hw M14 + d 8P N14 + d () P14 + d R14 + d T14 + d $ A15 + d B15 + d C15 + d ȯ D15 + d E15 + d a F15 + d : G15 + d H15 + d x J15 + d h K15 + d X L15 + d Hw M15 + d 8P N15 + d () P15 + d R15 + d T15 + d$ $ A16 + d$ B16 + d$ C16 + d$ ȯ D16 + d$ E16 + d$ a F16 + d$ : G16 + d$ H16 + d$ x J16 + d$ h K16 + d$ X L16 + d$ Hw M16 + d$ 8P N16 + d$ () P16 + d$ R16 + d$ T16 1 _ >NAME 1 e >VALUE" 0 " " X " X L " 3 ! " 3! ! " 3 ! ! " 3! ! " 3! " 3 " 3 " 3 " " Ȼ` " Ȼ`0 " ` " ` " " " L p " p Ȼ " Ȼ " L L " L P@ ` " P@ `L " L L " L L L p " L p 8D " 8D L " 0L L " L P@ " P@ X L " X L L L " L L " L `8D " `8D 0L % 3 $
k PCI9056 PCI 9056 PCI Bus Mastering I/O Accelerator
between a 32-bit, 66 MHz PCI Bus and 32-bit, 66 MHz processor Local Bus
Data Book Version 0.91b February 2002
Website: http://www.plxtech.com PRESENT_DET USERO/LLOCKO# USERI/LLOCKI MDREQ#/DMPAF#/EOT# BDIP#/WAIT# RETRY#/BREQO TEA#/LSERR# BURST#/BLAST# RD/WR#/LW/R# TSIZ1/LBE2# TSIZ0/LBE3# BIGEND#/WAIT#1 LA0/LA31/DT/R# LA1/LA30/DEN# LA2/LA29/ALE LD20/LD11/LAD11 LD4/LD27/LAD27 LD1/LD30/LAD30 LD30/LD1/LAD1 LD27/LD4/LAD4 LD23/LD8/LAD8 LD19/LD12/LAD12 LD14/LD17/LAD17 LD11/LD20/LAD20 LD7/LD24/LAD24 LD3/LD28/LAD28 LD28/LD3/LAD3 LD26/LD5/LAD5 LD22/LD9/LAD9 LD18/LD13/LAD13 LD15/LD16/LAD16 LD12/LD19/LAD19 LD8LD23/LAD23 LD6/LD25/LAD25 LD2LD29/LAD29 LD31/LD0/LAD0 LD25/LD6/LAD6 LD24/LD7/LAD7 LD21/LD10/LAD10 LD17/LD14/LAD14 LD16/LD15/LAD15 LD13/LD18/LAD18 LD10/LD21/LAD21 LD9/LD22/LAD22 LD5/LD26/LAD26 LD0/LD31/LAD31 LD29/LD2/LAD2 PWR-PCI9056 PCI 9056 Data Book, Version 0.91 2001 PLX Technology, Inc.
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