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>NAME1`X" >VALUEgk4034,B8,8cB7,pB6,)B5,B4,B3,PSB2,B1,X!AE, s!DS,!A/B\,!P/S\,xI!A/S\,9!CLK,#A1,PS#A2,#A3,#A4,)#A5,p#A6,8c#A7,#A8"^X@)@"^)@)"^)X"^XX@1_X2" >NAME1`X" >VALUEg24035,Q0, s!T/C\,X!K,9!J,!RES,!CLK,Ȝ!P/S\,!P0,!P1,)!P2,p!P3,pQ3,)Q2,Q1"^X)"^))PS"^)PSXPS"^XPSX1_Xl" >NAME1`XxI" >VALUEgk,4038,XS3, s!I3,!CLK,8cS2,!I2,xI!CR,!I1,S1,PS!A1,!B1,8c!B2,p!A2,X!B3,9!A3"^X@)@"^)@)"^)X"^XX@1_XV" >NAME1`X" >VALUEg4040,Q12,Q6,8cQ5,ȜQ7,pQ4,)Q3,Q2,Q1,!P1,!RES,XQ9,9Q8, sQ10,Q11"^XxI)xI"^)xI)PS"^)PSXPS"^XPSXxI1_Xl" >NAME1`X@" >VALUEg24041,QA,QA\,!A,pQB,8cQB\,p!B,ȜQC,9QC\,Ȝ!C, sQD,QD\, s!D"^X)"^))PS"^)PSXPS"^XPSX1_Xl" >NAME1`XxI" >VALUEg4042,XQ3,)Q0,pQ0\,)!D0,9!CLK, s!POL,p!D1,Q1\,8cQ1,ȜQ2,9Q2\,8c!D2,!D3, sQ3\"^X)"^))"^)X"^XX1_X" >NAME1`X" >VALUEg,4043,XQ3,PSQ0,!R0,PS!S0,!EN,)!S1,p!R1,)Q1,Q2,Ȝ!R2,!S2,X!S3, s!R3"^XxI)xI"^)xI)"^)X"^XXxI1_XV" >NAME1`X@" >VALUEg,4044,XQ3,!S0,PS!R0,!EN,)!R1,p!S1,)Q1,Q2,Ȝ!S2,!R2,PSQ0,X!R3, s!S3"^XxI)xI"^)xI)"^)X"^XXxI1_XV" >NAME1`X@" >VALUE4046,PSPP,PSPC1,!CIN,"VCOOUT, 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X15*D[X16*|X17*!X18*X19*$X20*\KX21*X22*X23*uX24*u)25*)26*)27*\K)28*$)29*)30*!)31*|)32*D[)33* )34*Ԕ)35*1)36*d)37*,k)38*)39*)40*A)41*L)42*{)43*)44*)45*lQ)46*4)47*)48".rҍ"ҍҍ"ҍ.r1Lc"(>NAME1vP"(>VALUE".r.r"".r.rZ".r".rZ|$l|``*{,k1*L,k2*d,k7*1,k81?(>NAME*A,k3*,k4*,k,k6*,k512(>VALUE*Ԕ,k9* ,k10*D[,k11*|,k12*!,k13*,k14*Ԕ15*!Ԕ16*|Ԕ17*D[Ԕ18* Ԕ19*ԔԔ20*1Ԕ21*dԔ22*,kԔ23*Ԕ24"0rxIr"0xI"0r"0xIrxI'"0xIxIP"0xI'xIP|*Ԕ25*AԔ26*LԔ27*{Ԕ28 ``*LX1*AX2*X3*X4*,kX5*dX6*1X7*ԔX8* X9*D[X10*|X11*!X12*!)13*|)14*D[)15* )16*Ԕ)17*1)18*d)19*,k)20*)21*)22*A)23*L)241Ν"(>NAME"d1(F"(>VALUE"1d|"ZNZN"1"ZN"ZN$l;`3`*{X1*LX2*AX3*X4*X5*,kX6*dX7*1X8*ԔX9* X10*D[X11*|X12*!X13*X14*)15*!)16*|)17*D[)18* )19*Ԕ)20*1)21*d)22*,k)23*)24*)25*A)26*L)27*{)281xI"(>NAME"nNdnN1~J"(>VALUE"nN1nNd|""nNnN1"nN"nN |h```*L,k1*A,k2*,k3*,k4*,k,k5*d,k6*1,k7*Ԕ,k8* ,k9*D[,k10*|,k11*!,k12*!Ԕ13*|Ԕ14*D[Ԕ15* Ԕ16*ԔԔ17*1Ԕ18*dԔ19*,kԔ20*Ԕ21*Ԕ22*AԔ23*LԔ241җ"(>NAME"2ܒ1$F">VALUE"2|"dIܒdI$m"ܒdIܒ"$mdI$m"$m18-bit static SHIFT REGISTERDual COMPLIMENTARY PAIR plus INVERTER4-bit full ADDERHex BUFFER, invertingHex BUFFER, non-invertingDual D FLIP FLOP, set/reset8-bit static SHIFT REGISTERDual 4-bit static SHIFT REGISTERQuad bilateral ANALOG SWITCHCOUNTER/DIVIDERCOUNTER/DIVIDERQuad AND-OR select gate14-stage binary/ripple COUNTERDivide-by 8 COUNTER7-stage binary/ripple COUNTERDecade COUNTER/DIVIDER, 7-seg. outputsDual JK FLIP FLOPBCD to decimal DECODERBinary/decimal up/down COUNTER64-bit static SHIFT REGISTERTriple serial ADDER, positive logicDecade COUNTER/DIVIDER, 7-seg. outputs8-bit bidirectional BUS REGISTER4-bit parallel in/out SHIFT REGISTERTriple serial ADDER, negative logic12-stage binary/ripple COUNTERQuad true/complement BUFFERQuad clocked D LATCHQuad 3-state NOR R/S LATCHQuad 3-state NAND R/S LATCHMicropower PLLLP monostable/astable MULTIVIBRATORExpandable 8-input GATE8-channel ANALOG MULTIPLEXERDual 4-channel ANALOG MULTIPLEXERTriple 2-channel ANALOG MULTIPLEXERBCD to 7-segment LCD DRIVERBCD to 7-segment LCD DECODER/DRIVER14-stage binary/ripple COUNTER4-bit magnitude COMPARATOR8-input NANDHex INVERTERQuad D-type REGISTERBinary rate MULTIPLIER8-stage SHIFT/STORE REGISTER, tri-stateNon-inverting JK master slave FLIP FLOPInverting gated JK master slave FLIP FLOP8-Bit addressable LATCH8-bit static SHIFT REGISTERHex inverting BUFFERHex non-inverting BUFFERQuad bilateral ANALOG SWITCH16-channel ANALOG MULTIPLEXERDual 8-channel ANALOG MULTIPLEXERQuad 2-input NOR4-input NORQuad 2-input NANDDual 4-input NANDTriple 3-input NANDTriple 3-input NORQuad XORQuad 2-input ORDual 4-input ORTriple 3-input ANDTriple 3-input ORQuad XNOR8-input NORQuad 2-input ANDDual 4-input ANDQuad 2-input NAND schmitt triggerQuad 2-input XORHex SCHMITT TRIGGERDual 3-input NOR & INVERTERSynchronous presettable BCD COUNTERSynchronous presettable 4-bit binary COUNTERSynchronous presettable BCD COUNTERSynchronous presettable 4-bit binary COUNTERHex D FLIP FLOPQuad D FLIP FLOP4-bit universal SHIFT REGISTERQuad precision TIMER/DRIVERHex contact BOUNCE ELIMINATORBinary up down COUNTER21 -Stage Counter

Source: www.radanpro.com/el/datasheets_cmos.htm
cd_4045.pdf

Type Manufatk.
4045BDCFCH
4045BDMFCH
40458BFCFCH
4045BFMFCH
4045BPCFCH
CD4045ADRCA
CD4045AERCA
CD4045AFRCA
CD4045AHRCA
CD4045AKRCA
CD4045BDRCA
CD4045BERCA
CD4045BFRCA
CD4045BHRCA
CD045BKSCA
HCC4045BDSCA
HCC4045BFSGS
HCC4045BKSGS
HCF4045BESGS
HCF4045BFSGS
CMOS Logic Devices, 4000 Series

Based on the following sources:

  • Motorola CMOS LOGIC DATA; book, 02/88, DL131 REV 1
  • http://www.elexp.com
  • http://www.intersil.com
  • http://www.ls3c.com.tw/product/1/COMOS.html
Created by librarian@cadsoft.deSmall Outline package 8 150 milSmall Outline package 150 milSmall Outline package 150 milWide Small Outline package 300 milWide Small Outline package 300 milWide Small Outline package 300 milPlastic Leaded Chip CarrierPlastic Leaded Chip Carrier

IPC standardPlastic Leaded Chip Carrier

IPC standardLCC 20 Leadless Chip Carrier

Ceramic PackageLeadless Chip Carrier

Ceramic PackageDual In Line PackageDual In Line PackageDual In Line PackageDual In Line PackageDual In Line PackageDual In Line PackageDual In Line PackageDIL28-3Dual In Line Package SmallDIL24-6Dual In Line Package 0.6 inchDIL28-6Dual In Line Package 0.6 inchDIL24-3Dual In Line Package 0.3 inch嶶O